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单词 JK flip flop
释义

JK flip flop

中文百科

触发器 Flip-flop (electronics)

(重定向自JK flip flop)
R1, R2 = 1 kΩ, R3, R4 = 10 kΩ
触发器电路图,取自Eccles与Jordan在1918年时申请专利的文件。
由或非门所组成的RS触发器
D正反器符号。> 是时脉输入,D是数据输入,Q是暂存数据输出,Q'则是Q的反相值,S为1时强迫Q值为1,R为1时强迫Q值为0,以下图例同

触发器英语:Flip-flop, FF),中国大陆译作「触发器」、**及香港译作「正反器」,是一种有两种稳态的用于储存组件,可记录二进位制数字信号「1」和「0」。触发器是一种双稳态多谐振荡器(bistable multivibrator)。该电路可以通过施加在一个或多个控制输入端的信号来改变状态,并会有1个或2个输出。触发器是构成时序逻辑电路以及各种复杂数字系统的基本逻辑单元。触发器和锁存器是在计算机、通讯和许多其他类型的系统中使用的数字电子系统的基本组成部分。

触发器的线路图由逻辑门组合而成,其结构均由SR锁存器衍生而来(广义的触发器包括锁存器)。触发器可以处理输入、输出信号和时脉之间的相互影响。这里的触发器特指flip-flop,flip-flop一词主要是指具有两个状态相互翻转,例如编程语言中使用flip-flop buffer(翻译作双缓冲)。

英语百科

Flip-flop (electronics) 触发器

(重定向自JK flip flop)
An animated interactive SR latch (R1, R2 = 1 kΩ R3, R4 = 10 kΩ).
An SR latch, constructed from a pair of cross-coupled NOR gates.
Flip-flop schematics from the Eccles and Jordan patent filed 1918, one drawn as a cascade of amplifiers with a positive feedback path, and the other as a symmetric cross-coupled pair
A traditional flip-flop circuit based on bipolar junction transistors

In electronics, a flip-flop or latch is a circuit that has two stable states and can be used to store state information. A flip-flop is a bistable multivibrator. The circuit can be made to change state by signals applied to one or more control inputs and will have one or two outputs. It is the basic storage element in sequential logic. Flip-flops and latches are fundamental building blocks of digital electronics systems used in computers, communications, and many other types of systems.

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更新时间:2025/6/17 8:11:11