可测试性设计（英语：Design for Testability, DFT）是一种集成电路设计技术，它将一些特殊结构在设计阶段植入电路，以便设计完成后进行测试。电路测试有时并不容易，这是因为电路的许多内部节点信号在外部难以控制和观测。通过添加可测试性设计结构，例如扫描链等，内部信号可以暴露给电路外部。总之，在设计阶段添加这些结构虽然增加了电路的复杂程度，看似增加了成本，但是往往能够在测试阶段节约更多的时间和金钱。

Design for testing or design for testability (DFT) consists of IC design techniques that add testability features to a hardware product design. The added features make it easier to develop and apply manufacturing tests to the designed hardware. The purpose of manufacturing tests is to validate that the product hardware contains no manufacturing defects that could adversely affect the product’s correct functioning.