在电子工程中，芯片载体（英语：chip carrier）是一种用于集成电路的表面安装封装技术。这种封装在正方形的封装四边都有接脚，相比起其内部用来挂载集成电路的空腔来，整个封装所占体积较大。芯片载体可以用J-shaped metal leads焊进电路板或者用插座或者不用接脚而用金属板来连接。如果接脚伸展到封装外，可以用平装（英语：flat pack）来描述。.芯片载体一般比双列直插封装更小而且由于芯片载体用到封装的全部四边所以可以接上较多接脚。芯片载体可以是陶瓷的或者塑胶的。有些芯片载体的封装样式、大小已于JEDEC等贸易工业组织注册、标准化。其他样式通常是一两家厂商专有的。

In electronics, a chip carrier is one of several kinds of surface mount technology packages for integrated circuits. Connections are made on all four edges of a square package; Compared to the internal cavity for mounting the integrated circuit, the package overall size is large. Chip carriers may have either J-shaped metal leads for connections by solder or by a socket, or may be lead-less with metal pads for connections. If the leads extend beyond the package, the preferred description is "flat pack". Chip carriers are smaller than dual in-line packages and since they use all four edges of the package can have a larger pin count. Chip carriers may be made of ceramic or plastic. Some forms of chip carrier package are standardized in dimensions and registered with trade industry associations such as JEDEC. Other forms are proprietary to one or two manufacturers. Sometimes the term "chip carrier" is used to refer generically to any package for an integrated circuit.