MESI protocol

MESI state diagram. PrRd = Processor Read - Read request from processor, PrWr = Processor Write - Write request from processor, BusRd = Bus - Read request from the bus without intent to modify. The 'S' denotes that the shared signal was asserted by another cache. BusRdX = Bus Read Exclusive - Read request from the bus with intent to modify. The transitions are labeled

The MESI protocol (known also as Illinois protocol due to its development at the University of Illinois at Urbana-Champaign) is a widely used cache coherence and memory coherence protocol. It is the most common protocol which supports write-back cache.

单词	MESI protocol
释义	MESI protocol 英语百科 MESI protocol The MESI protocol (known also as Illinois protocol due to its development at the University of Illinois at Urbana-Champaign) is a widely used cache coherence and memory coherence protocol. It is the most common protocol which supports write-back cache.
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