Emitter-coupled logic

Motorola ECL 10,000 basic gate circuit diagram[1]

The picture represents a typical ECL circuit diagram based on Motorola's MECL. In this schematic, transistor T5′ represents the output transistor of a previous ECL gate that provides a logic signal to input transistor T1 of an OR/NOR gate whose other input is at T2 and has outputs Y and Y. Additional pictures illustrate the circuit operation by visualizing the voltage relief and current topology at low input voltage (logical

In electronics, emitter-coupled logic (ECL) is a high-speed integrated circuit bipolar transistor logic family. ECL uses an overdriven BJT differential amplifier with single-ended input and limited emitter current to avoid the saturated (fully on) region of operation and its slow turn-off behavior. As the current is steered between two legs of an emitter-coupled pair, ECL is sometimes called current-steering logic (CSL), current-mode logic (CML) or current-switch emitter-follower (CSEF) logic.

单词	LVPECL
释义	LVPECL 英汉-汉英词典低电压正电源射极耦合逻辑词组 \| 习惯用语您要查找的是不是： peculiar adj. 特殊的；罕见的；奇怪的；独特的 n. 特权；特有财产 apical adj. 顶上的, 顶点的 pelvic adj. 骨盆的网络短语: LVPECL to ECL 翻译 LVPECL 低电压正射极耦合逻辑; 电平; 低电压伪发射极耦合逻辑; 差分输出; 英语百科 Emitter-coupled logic In electronics, emitter-coupled logic (ECL) is a high-speed integrated circuit bipolar transistor logic family. ECL uses an overdriven BJT differential amplifier with single-ended input and limited emitter current to avoid the saturated (fully on) region of operation and its slow turn-off behavior. As the current is steered between two legs of an emitter-coupled pair, ECL is sometimes called current-steering logic (CSL), current-mode logic (CML) or current-switch emitter-follower (CSEF) logic.
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LVPECL

您要查找的是不是：

网络短语:

Emitter-coupled logic