Delay Insensitive Minterm Synthesis
Invented by David E. Muller, the DIMS (Delay Insensitive Minterm Synthesis) system is an asynchronous design methodology making the least possible timing assumptions. Assuming only the Quasi-Delay-Insensitive delay model the generated designs need little if any timing hazard testing. The basis for DIMS is the use of two wires to represent each bit of data. This is known as a Dual-Rail data encoding. Parts of the system communicate using the early four-phase asynchronous protocol.